Device having a silicon oxide film containing krypton

ABSTRACT

A silicon oxide film ( 1701 ) serving as a gate insulating film of a semiconductor device contains Kr. Therefore, the stress in the silicon oxide film ( 1701 ) and the stress at the interface between silicon and the silicon oxide film are relaxed, and the silicon oxide film has a high quality even though it was formed at a low temperature. The uniformity of thickness of the silicon oxide film ( 1701 ) on the silicon of the side wall of a groove (recess) in the element isolating region is 30% or less. Consequently, the silicon oxide film ( 1701 ) has its characteristics and reliability superior to those of a silicon thermal oxide film, and the element isolating region can be made small, thereby realizing a high-performance transistor integrated circuit preferably adaptable to an SOI transistor and a TFT.

TECHNICAL FIELD

The present invention relates to semiconductor devices using siliconoxide films and methods for forming silicon oxide films, particularly tosemiconductor devices using very thin silicon oxide films, semiconductordevices including element isolation structures in which a dielectricsubstance is buried in silicon, semiconductor devices including elementisolation structures formed on an insulating film, and methods andapparatus for forming silicon oxide films.

BACKGROUND ART

The gate insulating films of transistors formed on silicon substratesrequire high performance characteristics such as low interface leveldensity, and high reliability such as high withstand voltage and highhot carrier tolerance. As a conventional oxide film formation techniqueto meet those requirements, thermal oxidation at 800° C. or more hasbeen used.

Besides, from a demand for forming transistors on a siliconsemiconductor at higher density, for transistor integrated elementsformed on a silicon substrate, in concert with the progress ofscale-down technique, in place of selective oxidation film (LOCOS)element isolation structures in which bird's beaks extend, elementisolation structures such as shallow trench isolation that enablesnarrow dielectric isolation came to be used.

Besides, for integrated elements such as SOI (Silicon On Insulator)transistors and polysilicon transistors formed on an insulating film,used were element isolation structures in which silicon films are formedinto islands by LOCOS isolation with silicon oxide films and mesaisolation by etching silicon off.

For formation of semiconductor elements with ultrahighintegration/ultrahigh speed drive, however, conventional thermaloxidation can not be used. To realize ultrahigh speed elements, ametallic material must be introduced in the semiconductor device. But,if a high temperature process at 550° C. or more is used, the metal canreact with the semiconductor to deteriorate the operation performance ofthe elements. Besides, if such a high temperature process is used, itbecomes difficult to form an accurate impurity distribution because ofrediffusion of impurities. This makes it hard to form ultrahighintegrated elements. Therefore, oxide film formation at a lowtemperature of 550° C. or less is indispensable.

So, in recent years, techniques for forming silicon oxide films at lowtemperatures have been studied. But, characteristics of a silicon oxidefilm formed at 550° C. or less were never equal to those of a thermaloxide film. The oxidation speed of such conventional low-temperatureoxidation is lower than that of thermal oxidation, so electricalcharacteristics, such as interface level density and current-voltagecharacteristic, of a silicon oxide film formed were greatly inferior tothose of a thermal oxide film.

Besides, in a conventional element isolation structure for transistorintegrated elements formed on a silicon substrate, the thickness of asilicon oxide film at a portion near a corner of an element isolationside wall portion is smaller than that on a flat silicon surfaceportion. Therefore, a problem arose that characteristics such as leakagecurrent and withstand voltage of the oxide film are inferior at the thinportion and the reliability in performance of the elements aredeteriorated. Further, since a parasitic transistor element having itsthin gate oxide film exists in parallel with a transistor element havingits gate oxide film of a normal thickness, this deteriorated thevoltage-current characteristic of the transistor.

In order to solve such problems, if the thickness of the silicon oxidefilm is simply increased to avoid the problem that arises at the thinportion, since the silicon oxide film also serves as a gate oxide film,a problem arises that the drive performance of the MOS transistordeteriorates. So, conventionally, the angle of the side wall portion ofthe recessed portion in the element isolating region with the siliconsurface is set at about 70 degrees or less so that thinning of thesilicon oxide film at corners of the side wall portion is relieved. Evenin this case, however, about 30% or more thinning occurred, andoccurrence of characteristic deterioration such as leakage current andwithstand voltage of the oxide film at the thin portion could notcompletely be prevented. Furthermore, formation of the recessed elementisolating region with an obtuse angle brought about problems that theelement isolation width increased, the ratio in area of the effectiveregion where elements such as transistors are to be formed decreased,and high density integration could not be intended.

Furthermore, in a conventional element isolation structure forintegrated elements such as SOI (Silicon On Insulator) transistors andpolysilicon transistors formed on an insulating film, in case of LOCOSelement isolation, a parasitic transistor element existed near theinterface between the element isolation oxide film below a gateelectrode and silicon. This deteriorated electrical characteristics ofthe transistor, in particular, subthreshold current characteristic andoff-leak characteristic. On the other hand, in case of mesa elementisolation, a high quality oxide film could not be formed on the elementisolation side wall portion where silicon has been etched off. This hada bad influence on characteristics, in particular, off characteristics,of the transistor.

Accordingly, it is an object of the present invention to providesemiconductor devices, and methods and apparatus for forming siliconoxide films, which make it possible to realize silicon oxide filmshaving, even though they were formed by low-temperature plasmaoxidation, characteristics and reliability superior to those of siliconthermal oxide films formed at a high temperature of about 1000° C., andto realize high-performance transistor integrated circuits that canreduce the area of their element isolating regions and be suitablyapplied to SOI transistors and TFTs.

SUMMARY OF THE INVENTION

The present invention was made for solving those conventional problems,and a semiconductor device of the present invention includes a pluralityof transistors with their substrate of silicon, and is characterized inthat at least part of a silicon oxide film formed on a surface of saidsilicon contains Kr (krypton).

According to an aspect of the semiconductor device of the presentinvention, a recessed groove is formed at part of said substrate surfacebetween said plurality of transistors, and a dielectric substance isformed in part of said groove, said silicon oxide film is formed on acorner of said substrate surface in said groove, and at least part ofsaid silicon oxide film contains Kr.

According to an aspect of the semiconductor device of the presentinvention, a side wall portion in said groove is formed such that theangle of part of said side wall portion with said substrate surfaceexceeds at least 75 degrees.

According to an aspect of the semiconductor device of the presentinvention, the difference in thickness of said silicon oxide filmbetween the portions formed on at least part of the surface other thansaid groove of said substrate and on at least part of the surface insaid groove is within 30%.

A semiconductor device of the present invention wherein a semiconductorfilm at part of a surface of which a recessed groove is formed or anisland-shape semiconductor film is formed on an insulating film, ischaracterized in that a silicon oxide film is formed on a corner of saidsemiconductor film of said groove or a corner of said semiconductorfilm, and at least part of said silicon oxide film contains Kr.

According to an aspect of the semiconductor device of the presentinvention, the content of Kr contained in said silicon oxide filmdecreases from said silicon oxide film surface toward a silicon/siliconoxide film interface.

According to an aspect of the semiconductor device of the presentinvention, the Kr content in said silicon oxide film is 5×10¹¹ cm⁻² orless at the surface density.

A method of the present invention for forming a silicon oxide film, ischaracterized by introducing a mixture gas mainly containing a gascontaining oxygen and Kr gas into a process chamber, exciting plasmawith a microwave, and directly oxidizing a silicon substrate surfaceplaced in the process chamber, thereby forming a silicon oxide film onsaid silicon substrate surface.

According to an aspect of the method of the present invention forforming a silicon oxide film, said silicon oxide film is the gateinsulating film of a transistor.

According to an aspect of the method of the present invention forforming a silicon oxide film, the oxygen partial pressure in saidmixture gas is 2 to 4%, and the pressure in said process chamber is 800mTorr (106 Pa) to 1.2 Torr (160 Pa).

According to an aspect of the method of the present invention forforming a silicon oxide film, said plasma is plasma excited with amicrowave of a frequency of 900 MHz to 10 GHz.

An apparatus of the present invention for forming a silicon oxide film,is characterized by comprising a process chamber in which a siliconsubstrate is placed, and a waveguide tube for supplying a microwave insaid process chamber, and in that a mixture gas mainly containing a gascontaining oxygen and Kr gas is introduced into said process chamber,plasma is excited with the microwave, and said silicon substrate surfaceis directly oxidized, thereby forming a silicon oxide film on saidsilicon substrate surface.

A semiconductor device of the present invention includes a plurality oftransistors each having its source and drain regions each comprising ahigh impurity concentration region, and is characterized in that atleast part of the portion between said source and drain regions is asilicon oxide film containing Kr.

In the present invention, even though it was formed by low-temperatureplasma oxidation, formation of a silicon oxide film having itscharacteristics and reliability superior to a silicon thermal oxide filmformed at a high temperature of about 1000° C. becomes possible, and ahigh-performance transistor integrated circuit can be realized.

In the present invention, the thickness of the silicon oxide film at aportion near a corner of an element isolation side wall portion is neverthinned, and it is substantially equal to the film thickness of the flatsilicon surface portion. Therefore, characteristics of the oxide filmsuch as leakage current and withstand voltage are good, and so animprovement of reliability of the element can be realized. Besides,since this silicon oxide film is usable even in a thinned state as agate oxide film, both of an improvement of reliability of elementisolation and an improvement of drive performance of a MOS transistorcan be realized at once. Besides, even if the angle of the side wallportion of the recessed portion of the element isolating region of thesilicon substrate with the silicon surface is set at about 75 degrees ormore or 90 degrees, thinning of the silicon oxide film at a corner ofthe side wall portion does not occur, and so a narrow element isolatingregion can be formed, the ratio in area of the effective region forforming elements such as transistors increases, and high densityintegration can be realized.

Further, even in an element isolation structure for SOI (Silicon OnInsulator) transistors or polysilicon transistors formed on aninsulating film, a high-quality oxide film can be formed on the elementisolation side wall portion, and, without any parasitic transistorexisting, the electrical characteristics of each transistor can be good.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a conceptional view showing an example of apparatus using aradial line slot antenna for realizing a silicon oxide film formationmethod of the present invention;

FIG. 2 is a graph showing the dependence of oxidation film thickness onprocess chamber gas pressure in a high density plasma oxidation processat a substrate temperature of 400° C., Kr/O₂=97/3, and 2.45 GHz for tenminutes;

FIG. 3 is a graph showing the dependence of oxidation film thickness onoxidation time in a high density plasma oxidation process at a substratetemperature of 400° C., Kr/O₂=97/3, and 2.45 GHz, as well as dependenceon oxidation time in conventional dry oxidation (at substratetemperatures of 800° C., 900° C., and 1000° C.);

FIG. 4 is a graph showing the distribution along depth of Kr density ina silicon oxide film;

FIG. 5 is a graph showing kinds of rare gases used in silicon oxidation,and ratios in composition of oxygen to silicon in silicon oxide filmsobtained;

FIG. 6 is a graph showing kinds of rare gases used in growths of siliconoxide films, and a result of measurement of interface level densities ofthe silicon oxide films obtained;

FIG. 7 is a graph showing a result of examination of the relationbetween kinds of rare gases and activating energy for silicon oxide filmgrowth calculated from silicon oxide film growing speed;

FIG. 8 is a graph showing a result of examination of the relationsbetween oxygen partial pressure in Kr in a silicon oxide film formationatmosphere and interface level density in a silicon oxide film formedand its withstand voltage;

FIG. 9 is a graph showing a result of examination of the relationsbetween the whole pressure in a process chamber in a silicon oxide filmformation atmosphere and interface level density in a silicon oxide filmformed and its withstand voltage;

FIG. 10 is a graph showing the current-voltage characteristics of 3.5nm, 5.0 nm, 7.8 nm, and 10 nm-thick silicon oxide films obtained withmicrowave (2.45 GHz)-excited high density plasma of Kr/O₂=97%/3% at asubstrate temperature of 400° C. when electrons have been injected fromthe substrate side and a positive voltage is applied through electrodes(for reference, the characteristics in case of the same thickness, 1000°C., and dry oxidation are also shown);

FIG. 11 is a graph showing the J²/E-I/E characteristic, i.e., the F-Ncharacteristic when the current density flowing through a silicon oxidefilm formed with microwave (2.45 GHz)-excited high density plasma ofKr/O₂=97%/3% is J (A/cm²), and the electric field intensity is E (MV/cm)(three kinds in thickness of silicon oxide films are used, i.e., 5.0 nm,7.8 nm, and 10 nm);

FIGS. 12A to 12C are graphs showing the breakdown fields of siliconoxide films formed with microwave (2.45 GHz)-excited high density plasmaof Kr/O₂=97%/3%, and 1000° C. dry-oxide films in relation to three kindsof films, i.e., 3.5 nm, 5.0 nm, and 7.8 nm, respectively;

FIG. 13 is a graph showing the amounts of charges QBD(Charge-to-Breakdown) till silicon oxide films are broken down when astress current of 1 A/cm² is applied from the substrate side, inrelation to Kr/O₂ high density plasma oxidation, 800° C. wet oxidation,and 900° C. dry oxidation;

FIG. 14 is a graph showing the subthreshold characteristics of MOStransistors formed on monocrystalline silicon substrates, which graphshows the characteristics when a gate oxide film formed with Kr/O₂ highdensity plasma at a substrate temperature of 400° C. and a conventionalgate oxide film formed by about 900° C. thermal oxidation are used asthe gate insulating films;

FIG. 15 is a graph showing the relation between the drain current andthe gate voltage of MOSFET (in the figure, marks ◯ represent a casewherein a Kr/O2 plasma oxide film is used as the gate insulating film,and, in the figure, marks  represent a case wherein a thermal oxidefilm is used as the gate insulating film);

FIGS. 16A and 16B are conceptional views showing a shallow trenchisolation structure;

FIGS. 17A and 17B are conceptional views showing a difference incoverage between gate insulating films when the shallow trench isolationstructure is applied to a prior art (a case of thermal oxidation) andthe present invention (oxidation with Kr/O2 high density plasma);

FIG. 18 is a graph showing a difference between the QBD characteristicsof MOS capacitors when the shallow trench isolation structure is appliedto a prior art (a case of thermal oxidation) and the present invention(oxidation with Kr/O₂ high density plasma);

FIG. 19 is a graph showing the relation between the shallow trenchisolation taper angle and the edge portion film thinning rate when theshallow trench isolation structure is applied to a prior art (a case ofthermal oxidation) and the present invention (oxidation with Kr/O₂ highdensity plasma);

FIG. 20 is a sectional view of MOS transistors made on a metallicsubstrate SOI;

FIG. 21 is a sectional view of MOS transistors made on a SOI substrate;

FIG. 22 are graphs showing subthreshold characteristics when a gateinsulating film of a device is applied to a prior art (a case of thermaloxidation) and the present invention (oxidation with Kr/O₂ high densityplasma);

FIG. 23 is a conceptional view of a microwave-excited high densityplasma apparatus for glass substrates and plastic substrates;

FIGS. 24 are sectional views showing a conventional TFT device structureand an improved TFT device structure;

FIG. 25 is a graph showing a result of measurement of the relationbetween the gate voltage and the drain current of TFT devices;

FIG. 26 is a sectional view of polysilicon TFTs for driving a displaysection such as an LCD;

FIG. 27 is a sectional view of polysilicon TFTs for driving a displaysection such as an LCD; and

FIG. 28 is another sectional view of a polysilicon TFT for driving adisplay section such as an LCD.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, specific embodiments to which the present invention isapplied will be described in detail with reference to drawings.

Embodiment 1

Low-temperature oxide film formation using plasma will be describedfirst. FIG. 1 is a sectional view showing an example of apparatus usinga radial line slot antenna for realizing an oxidation method of thepresent invention (refer to Japanese Patent Application No. 9-133422).

The present invention has a novel characteristic feature wherein Kr isused in plasma-exciting gas. This apparatus is mainly effective for acircular substrate. A vacuum vessel (process chamber) 101 is madevacuous, Kr gas and O₂ gas are introduced through a shower plate 102,and, for example, the pressure in the process chamber is set at about 1Torr (133 Pa). A circular substrate 103 such as a silicon wafer isplaced on a sample table 104 with a heating system, and, for example,setting is made such that the temperature of the sample becomes 400° C.If this temperature setting is within the range of 200 to 500° C., thesame result as that described below can be obtained. A microwave of 2.45GHz is supplied from a coaxial waveguide tube 105 through a radial lineslot antenna 106 and a dielectric plate 107 into the process chamber,and high density plasma is generated in the process chamber. Thenarrower this distance is, the more rapid the possible film formationis. Besides, if the frequency of the microwave supplied is within therange not less than 900 MHZ and not more than 10 GHz, the same result asthat described below can be obtained. The distance between the showerplate 102 and the substrate 103 is set at 6 cm in this embodiment.Although an example wherein film formation was done using the plasmaapparatus with the radial line slot antenna was shown in thisembodiment, the microwave may be introduced into the process chamberusing another method.

In the high density plasma of the mixture gas of Kr and O₂, Kr* in anintermediate excitation state collides with an O₂ molecule, and atomicoxygen O* is efficiently generated. With this atomic oxygen, thesubstrate surface is oxidized. Until now, for example, oxidation ofsilicon surfaces was made with H₂O molecules or O₂ molecules, and theprocess temperatures were very high as 800 to 1100° C. However,oxidation with atomic oxygen is possible at a sufficiently lowtemperature. To increase opportunities of collision between Kr* and O₂,the higher process chamber pressure is desirable. But, if the pressureis too high, generated O* radicals collide with each other and return toan O₂ molecule. Of course, there is the optimum gas pressure. FIG. 1shows the oxide film thickness that grows through an oxidation processat a silicon substrate temperature of 400° C. for ten minutes, when thegas pressure in the process chamber is changed while the pressure ratioin the process chamber is kept at 97% Kr/3% oxygen. When the gaspressure in the process chamber is 1 Torr (133 Pa), the oxide filmbecomes the thinnest. This pressure or its vicinity is optimal.

FIG. 3 shows the relation between the oxide film thickness and theoxidation time upon silicon substrate surface oxidation using Kr/O₂ highdensity plasma. FIG. 3 also shows the dependence on the oxidation timein conventional dry oxidation, in relation to substrate temperatures800° C., 900° C., and 1000° C. It is clear that the oxidation speed ofthe Kr/O₂ high density plasma oxidation when the substrate temperatureis 400° C. and the pressure in the process chamber is 1 Torr (133 Pa) ishigher than that of the atmospheric pressure dry O₂ oxidation when thesubstrate temperature is 1000° C. Introduction of silicon substratesurface oxidation using Kr/O₂ high density plasma considerably improvesproductivity of the surface oxidation technique.

Further, in a conventional high-temperature thermal oxidation technique,O₂ molecules or H₂O molecules pass through the oxide film formed on thesurface, by diffusion. They reach the interface between silicon/siliconoxide film and contribute to oxidation. Thus it was common knowledgethat the oxidation speed is greatly influenced by the diffusion speed ofO₂ or H₂O molecules in the oxide film, and increases in proportion tot^(½) with the oxidation time t.

In this case of Kr/O₂ high density plasma, however, the oxidation speedis linear till 35 nm of the oxide film thickness. This shows that atomicoxygen can freely pass through the silicon oxide film. Namely, it isclear that the diffusion speed is very high.

FIG. 4 shows a result of an examination in which the distribution alongdepth of the Kr density in a silicon oxide film formed through theabove-described process was examined with a full-reflection fluorescenceX-ray spectrometer. The examination was done under the conditions thatthe partial pressure of oxygen in Kr was 3%, the pressure in the processchamber was 1 Torr (133 Pa), and the substrate temperature was 400° C.The thinner the oxide film thickness is, the more the Kr densitydecreases. At the silicon oxide film surface, Kr exists at a density ofabout 2×10¹¹ cm⁻². That is, this silicon oxide film is a film in whichthe Kr concentration in the film of the thickness of 4 nm or more isconstant and the Kr concentration decreases toward the interface betweensilicon/silicon oxide film.

FIG. 5 shows kinds of rare gases (Kr, Ar, He) used in silicon oxide filmgrowth, and a result of an examination in which the ratio in compositionof oxygen to silicon in silicon oxide films obtained was examined withan X-ray photoelectron spectrometer. Formation of the silicon oxidefilms was done with the apparatus shown in FIG. 1 at a substratetemperature of 400° C. The partial pressure of oxygen in each rare gasand the pressure in the process chamber were fixed at 3% and 1 Torr (133Pa), respectively. For comparison, the ratio in composition of oxygen tosilicon in a thermal oxide film formed at a substrate temperature of900° C. in the atmosphere of 100% oxygen is also shown. In case of usinghelium gas (He) or argon gas (Ar), the composition ratio of the siliconoxide film shows poorness of oxygen. Contrastingly, the silicon oxidefilm formed using Kr gas shows the ratio of oxygen to silicon equivalentto that of the thermal oxide film. We suspect this is because theexcitation state of Kr very efficiently generates O* in comparison withHe or Ar.

FIG. 6 shows kinds of rare gases used in silicon oxide film growth, anda result of an examination in which the interface level density insilicon oxide films obtained was examined through low-frequency C-Vmeasurement. Formation of the silicon oxide films was done with theapparatus shown in FIG. 1 at a substrate temperature of 400° C. Thepartial pressure of oxygen in each rare gas and the pressure in theprocess chamber were fixed at 3% and 1 Torr, respectively. Forcomparison, the interface level density in a thermal oxide film formedat a substrate temperature of 900° C. in the atmosphere of 100% oxygenis also shown. The interface level density of the oxide film formedusing Kr gas is the lowest and it is equivalent to the interface leveldensity of the thermal oxide film formed in the dry oxidation atmosphereat 900° C.

FIG. 7 shows the relation between kinds of rare gases and activatingenergy for silicon oxide film growth calculated from silicon oxide filmgrowing speed. Formation of silicon oxide films was done with theapparatus shown in FIG. 1 at substrate temperatures within the range of200 to 400° C. The partial pressure of oxygen in each rare gas and thepressure in the process chamber were fixed at 3% and 1 Torr (133 Pa),respectively. In case of oxidation using helium gas (He) and argon gas(Ar), the activating energies are high as 0.5 eV and 0.8 eV,respectively. In case of using Kr gas, however, the activating energycan be held down to 0.13 eV. That is, if the dependence on temperatureis very low and atomic oxygen is efficiently generated, even at a lowtemperature as 200° C., a sufficiently high oxidation speed is realized.

FIG. 8 shows a result of examination of the relations between the oxygenpartial pressure in Kr in a silicon oxide film formation atmosphere, thewithstand voltage of a silicon oxide film, and the interface leveldensity in a silicon oxide film formed. In this case, the pressure inthe process chamber was fixed at 1 Torr (133 Pa). When the oxygenpartial pressure in Kr is 3%, the interface level density becomes theminimum and its value equivalent to the interface level density in athermal oxide film is obtained. Besides, the withstand voltage of thesilicon oxide film becomes the maximum also in the vicinity of 3% of theoxygen partial pressure. From the result of FIG. 8, the oxygen partialpressure upon oxidation using Kr/O₂ mixture gas is suitably 2 to 4%.

FIG. 9 shows the relations between pressure upon silicon oxide filmformation, and the withstand voltage and the interface level density ofa silicon oxide film. In this case, the oxygen partial pressure was 3%.When the pressure upon film formation is near 1 Torr, the withstandvoltage of the silicon oxide film becomes the maximum and the interfacelevel density becomes the minimum. From this, when an oxide film isformed using Kr/O₂ mixture gas, the pressure upon film formation isoptimally 800 to 1200 mTorr (106 to 160 Pa).

FIG. 10 shows the current-voltage characteristics of 3.5 nm, 5.0 nm, 7.8nm, and 10 nm-thick silicon oxide films obtained with microwave (2.45GHz)-excited high density plasma of Kr/O₂=97%/3% at a substratetemperature of 400° C. when a positive voltage is applied throughelectrodes to inject electrons into the silicon oxide films from thesubstrate side. For reference, the characteristics in case of the samethickness and 1000° C. dry oxidation are also shown. In the lowerelectric field region, the electric currents of the silicon oxide filmsgrown with Kr/O₂ are less than those of the thermal oxide films. In thehigher electric field region, both films show quite the samecharacteristics.

FIG. 11 shows the J/E²-I/E characteristic, i.e., the F-N characteristicwhen the current density flowing through a silicon oxide film formedwith microwave (2.45 GHz)-excited high density plasma of Kr/O₂=97%/3% isJ (A/cm²), and the electric field intensity is E (MV/cm). Although threekinds in thickness of silicon oxide films were used, i.e., 5.0 nm, 7.8nm, and 10 nm, the same characteristic was obtained almost irrespectiveof film thickness. It is found that F-N currents between 10⁻¹³ to 10⁻²²,i.e., over the range of nine figures, flow. The barrier height betweensilicon/silicon oxide films is 3.2 eV.

FIGS. 12A to 12C show the breakdown fields of silicon oxide films formedwith microwave (2.45 GHz)excited high density plasma of Kr/O₂=97%/3%,and 1000° C. dry-oxide films in relation to three kinds of films, i.e.,3.5 nm, 7.8 nm, and 7.8 nm as A, B, and C, respectively. In anythickness obtained were quite the same breakdown field intensities asthose of the corresponding thermal oxide film.

FIG. 13 shows the amounts of charges QBD (Charge-to-Breakdown) tillsilicon oxide films are broken down when a stress current of 1 A/cm² isapplied from the substrate side, in relation to Kr/O₂ high densityplasma oxidation, 800° C. wet oxidation, and 900° C. dry oxidation. Thethickness is 7.8 nm. The silicon oxide film grown with Kr/O₂ highdensity plasma shows its QBD value higher than those of 800° C. wetoxidation and 900° C. dry oxidation.

As for the above-described various characteristics, even thoughoxidation was done at a low temperature as 400° C., the oxide filmsgrown with Kr/O₂ high density plasma show the characteristics superiorto those of the conventional high-temperature thermal oxide films. Wesuspect this is because the stress in the oxide film or at the Si/SiO₂interface is relaxed by Kr being contained in the film, the charges inthe film and the interface level density are reduced, and thereby theelectrical characteristics of the silicon oxide film are considerablyimproved. In particular, we suspect that containing Kr at a surfacedensity of 5×10¹¹ cm⁻² or less contributes to the improvement of theelectrical characteristics of the silicon oxide film.

FIG. 14 shows the subthreshold characteristics of MOS transistors formedon monocrystalline silicon substrates, which figure shows thecharacteristics when a gate oxide film formed with the apparatus of FIG.1 using Kr/O₂ high density plasma at a substrate temperature of 400° C.and a conventional gate oxide film formed by about 900° C. thermaloxidation are used as the gate insulating films. The subthresholdcharacteristic (marks ◯ in the figure) of the MOS transistor with itsgate oxide film formed using the apparatus of FIG. 1 shows substantiallythe same characteristic as the subthreshold characteristic (marks  inthe figure) of the gate oxide film by thermal oxidation.

FIG. 15 shows the relation between the drain current and the gatevoltage of MOSFET. In the figure, marks ◯ represent a case wherein aKr/O₂ plasma oxide film is used as the gate insulating film, and, in thefigure, marks  represent a case wherein a thermal oxide film is used asthe gate insulating film. The oxide film thickness is 10 nm. Both showquite the same characteristic.

It was proved that sufficiently high quality semiconductor deviceformation is possible using low-temperature formed gate insulatingfilms.

To realize an oxide film of the present invention, another plasmaprocess apparatus that enables low-temperature oxide film formationusing plasma may be used. For example also possible is formation with atwo-stage shower plate type plasma process apparatus having first gasdischarging means for discharging Kr gas for exciting plasma by amicrowave, and second gas discharging means for discharging oxygen gasdifferent from the above first gas discharging means.

Embodiment 2

FIGS. 16A and 16B (an enlarged view in a circle shown by a broken lineof FIG. 16A) show conceptional views of a shallow trench isolation. Thisshallow trench isolation is formed by the manner that a siliconsubstrate 1603 surface is etched with plasma, a silicon oxide film 1602formed by a CVD method is formed on the silicon substrate surface afterbeing etched, and further the silicon oxide film formed is polishedusing a CMP method. After polishing, sacrificial oxidation is done byexposing the silicon substrate to a 800 to 900° C. oxidative atmosphere.A silicon oxide film formed by the sacrificial oxidation is etched offin a liquid chemical containing fluoric acid to obtain a highly puresilicon surface. After this, the substrate surface is cleaned using RCAcleaning, and a gate insulating film 1601 is formed. When a conventionalthermal oxidation method was used for the gate insulating film formationprocess, irrespective of formation conditions (dry oxidation or wetoxidation, or formation temperature), as shown in FIG. 17A, thinning ofthe gate insulating film 1071′ was confirmed at an edge portion of theshallow trench isolation. Reference numerals 1702 and 1703 denotes thesame components as the silicon oxide film 1602 and the silicon substrate1603, respectively.

Contrastingly, as shown in FIG. 17B, when the gate insulating film 1071is formed by oxidation using Kr/O₂ high density plasma according to thepresent invention, thinning of the gate insulating film 1071 does notoccur at the edge portion of the shallow trench isolation.

FIG. 18 shows the QBD characteristics when the gate oxide film of a MOScapacitor having a shallow trench isolation structure is formed by 800°C. wet oxidation, and when a silicon oxide film is formed by oxidationusing Kr/O₂ high density plasma. As stress, electric charges wereinjected from the substrate side toward the silicon oxide film with alow electric current of 1 A/cm². It was confirmed that QBD of thesilicon oxide film formed by 800° C. wet oxidation had a widedistribution on the lower QBD side caused by thinning at an shallowtrench isolation edge portion, and the reliability of the device wasbad. However, the QBD characteristic of the silicon oxide film formed byoxidation using Kr/O₂ high density plasma is very uniform. This isbecause thinning of the silicon oxide film thickness does not occur atthe shallow trench isolation edge portion. By using the silicon oxidefilm formation technique of the present invention, the reliability ofthe device was considerably improved.

FIG. 19 shows the relation between the taper angle of the shallow trenchisolation and the thinning rate of the silicon oxide film. In a siliconoxide film formed by a thermal oxidation method, as the taper angleincreased, thinning at an shallow trench isolation edge portion wentintensive, and it was hard to make the taper angle less than 75 degreesfor ensuring the device reliability. When the silicon oxide film isformed by oxidation using Kr/O₂ high density plasma according to thepresent invention, even if the taper angle increases to more than 75degrees, the uniformity of the silicon oxide film can be held down to30% or less even at the shallow trench isolation edge portion. Becauseit is possible to ensure the reliability even if the taper angle of theshallow trench isolation is increased, because the area of the elementisolating region reduces, further improvement of integration ofsemiconductor elements becomes possible.

Embodiment 3

Gate oxidation with Kr/O₂ microwave-excited high density plasma usingthe apparatus of FIG. 1 is optimal for integrated device fabrication ona metallic substrate SOI wafer in which a conventional high-temperatureprocess can not be used.

FIG. 20 is a sectional view of MOS transistors made on a metallicsubstrate SOI. Reference numeral 2001 denotes n++, p++ low-resistancesemiconductor, 2002 does a silicide layer such as NiSi, 2003 does aconductive nitride layer such as TaN or TiN, 2004 does a metal layersuch as Cu, 2005 does a conductive nitride layer such as TaN or TiN,2006 does n++, p++ low-resistance semiconductor layer, 2007 does anitride insulating film such as AlN or Si₃N₄, 2008 does a SiO₂ film,2009 does an insulating film of SiO₂, BPSG, or a combination of them,2010 does an n++ drain region, 2011 does an N++ source region, 2012 doesa p++ drain region, 2013 does a P++ source region, 2014 and 2015 do ahigh-resistance semiconductor layer, 2016 does a SiO₂ film formed withKr/O₂ microwave-excited high density plasma according to the presentinvention, 2017 and 2018 do an nMOS gate electrode and a pMOS gateelectrode made of, e.g., Ta, Ti, TaN/Ta, TiN/Ti, or the like, 2019 doesa nMOS source electrode, and 2020 does nMOS and pMOS drain electrodes.Reference numeral 2021 denotes a pMOS source electrode. Referencenumeral 2022 denotes a substrate surface electrode. For the substrateincluding a Cu layer protected by TaN or TiN, the thermal treatmenttemperature must be 700° C. or less in order to suppress the diffusionof Cu. The n++, p++ source/drain regions are formed by a thermaltreatment of 550° C. after ion implantation of As+, AsF₂+, or BF₂+.

Until now, there was no technique for forming a high-quality oxide filmat 700° C. or less. By Kr/O₂ microwave-excited high density plasmaoxidation, fabrication of the metallic substrate SOIMOSLSI shown in FIG.20 first became possible.

FIG. 21 is a conceptional view of a SOI device. Here, 2101 denotes asilicon substrate, 2102 does a SiO₂ layer, 2103 does a silicon oxidefilm formed with Kr/O₂ high density plasma, 2104 does an insulating filmof SiO₂, BPSG, or a combination of them, 2105 does an n++ source region,2106 does an nMOS source electrode, 2107 does a Sio2 film formed withKr/O₂ high density plasma according to the present invention, 2108 doesan nMOS gate electrode, 2109 does a drain electrode, 2110 does an n++drain region, 2111 does a p++ drain region, 2112 does nMOS and pMOSdrain electrodes, 2113 does a pMOS gate electrode, 2114 does a pMOSsource electrode, 2115 does a p++ source region, 2116 does an n-typesilicon layer, and 2117 does a p-type silicon layer.

Using this device structure, in case that a thermal oxide film was usedfor the gate insulating film, and in case that the gate insulating filmwas formed by oxidation using Kr/O₂ high density plasma, thesubthreshold characteristics of transistors are shown in FIG. 22. Whenthe gate insulating film was formed by thermal oxidation, in thesubthreshold characteristic, a kink due to bad coverage of the siliconoxide film is observed. When the gate insulating film was formed byoxidation using Kr/O₂ high density plasma, any kink is not observed inthe subthreshold characteristic. Even in case of using a mesa typeisolation structure, by forming the gate insulating film by oxidationusing Kr/O₂ high density plasma, considerable improvement of reliabilityis possible.

Embodiment 4

FIG. 23 is a conceptional view showing an example of apparatus foroxidizing a rectangular substrate such as a glass substrate or a plasticsubstrate. A vacuum vessel (process chamber) 2307 is put in adepressurized state, Kr/O₂ mixture gas is introduced through a showerplate 2301, gas is discharged through a thread groove pump 2302, and,for example, the pressure in the process chamber is set at 1 Torr. Aglass substrate 2303 is placed on a sample table 2304 with a heatingsystem, and, for example, setting is made such that the temperature ofthe glass substrate becomes 300° C. A microwave is supplied from a slitof a rectangular waveguide tube 2305 through a dielectric plate 2306into the process chamber to generate high density plasma in the processchamber. The shower plate 2301 serves also as a waveguide where themicrowave radiated from the waveguide tube is propagated to the rightand left as a surface wave.

FIGS. 24 show a conventional TFT device structure of an inverse-staggerstructure and an improved TFT device structure. Here, reference numeral2401 denotes a glass substrate or a plastic substrate, 2402 does a gateelectrode (Ti/Al/Ti), 2403 does a gate insulating film (Si₃N₄), 2404does a channel portion (non-doped amorphous silicon), 2405 does a source(n+ amorphous silicon), 2406 does a source electrode (Ti/Al/Ti), 2407does a drain (n+ amorphous silicon), 2408 does a drain electrode(Ti/Al/Ti), 2409 does an insulating interlayer (Si₃N₄), 2410 does apixel electrode (ITO), 2411 does a silicon oxide film for insulatingsource/drain, 2412 does an gate electrode (TaN/Cu), and 2413 does aback-surface transparent electrode (ITO).

On the back surface of the glass substrate of the improved TFT devicestructure, the ITO film 2413 is formed to improve the close contactbetween the substrate and the susceptor of the film formation apparatusby an electrostatic chuck, and prevent improvement ofreliability/uniformity of process, in particular, device break anddeterioration of device characteristics due to static electricity.Although a silicon nitride film is used for the gate insulating film2403 like the prior art, since considerable improvement of its withstandvoltage has succeeded, the thickness of the silicon nitride film can bedecreased to the degree of 100 to 200 nm though it conventionallyrequired about 400 nm. By thinning the silicon nitride film to a half,it becomes possible to improve the current drive performance of the TFTdevice substantially twice.

In the improved TFT device structure, since not the n+ amorphous siliconlayer between the source 2405 and the drain 2407 is etched by RIE, butthe n+ amorphous silicon layer is directly oxidized with the apparatusof FIG. 23 to insulate, the non-doped amorphous silicon layer 2404 asthe channel is never exposed to high-energy ion irradiation. Therefore,the non-doped amorphous silicon layer 2404 can be thinned from 150 nm toabout 30 nm. When the thickness of the non-doped amorphous silicon layer2404 as the channel becomes ⅕, since the resistance of the spatialcharge layer becomes about {fraction (1/25)}, the current driveperformance of the TFT device becomes 20 to 30 times. Because thethickness of the nondoped amorphous silicon layer 2404 could bedecreased to about ⅕ or less, the amount of generated electron-holepairs by a back light also could be decreased to about ⅕ or less, andthe dynamic range of the luminance of the LCD display section can beimproved by nearly one figure.

FIG. 25 shows the relation between the gate voltage and the draincurrent of TFT devices. In comparison with the conventional TFT device,the drain current of the improved TFT device is considerably increased,and it shows that the characteristic is considerably improved.Simultaneously, the leakage current upon reverse biasing is alsodecreased. This is because the interface characteristic between thenon-doped amorphous silicon and the SiO₂ layer is improved.

Embodiment 5

FIG. 26 shows a sectional structure of polysilicon TFTs made for aperipheral circuit of a display unit such as an LCD. Reference numeral2601 denotes a glass substrate or a plastic substrate, 2602 does anSi₃N₄ film, 2603 does the channel layer of a polysilicon PMOS, 2605 and2606 do the source region and the drain region of a polysilicon nMOS,respectively, and 2607 and 2608 do the source region and the drainregion of the pMOS, respectively. Reference numeral 2609 denotes a SiO₂layer according to the present invention, wherein a uniformly thicksilicon oxide film at either of its flat portion and its edge portion isformed on polysilicon. Reference numeral 2610 denotes the gate electrodeof the polysilicon nMOS, 2611 does the gate electrode of the polysiliconpMOS, 2612 does an insulating film such as SiO₂, BSG, or BPSG, 2613 and2614 do a source electrode and a drain electrode (simultaneously a drainelectrode of the polysilicon pMOS) of the polysilicon nMOS, 2615 does asource electrode of the polysilicon pMOS, and 2616 does a transparentelectrode such as surface ITO.

Besides, the present invention is applied also to polysilicon TFTs madefor a peripheral circuit of a display unit such as an LCD, as shown inFIG. 27. Reference numeral 2701 denotes a glass substrate or a plasticsubstrate, 2702 does an Si₃N₄ film, 2703 does the channel layer of apolysilicon pMOS, 2705 and 2706 do the source region and the drainregion of a polysilicon nMOS, respectively, and 2707 and 2708 do thesource region and the drain region of the pMOS, respectively. Referencenumeral 2709 denotes a SiO₂ layer according to the present invention,wherein the oxide film is not thinned even at the corners of the elementisolating region between the transistors, and a uniformly thick siliconoxide film at either of its flat portion and its edge portion is formedon polysilicon. Therefore, the electrical characteristics/reliability ofthe device were remarkably improved. Reference numeral 2710 denotes thegate electrode of the polysilicon nMOS, 2711 does the gate electrode ofthe polysilicon pMOS, 2712 does an insulating film such as SiO₂, BSG, orBPSG, 2713 and 2714 do a source electrode and a drain electrode(simultaneously a drain electrode of the polysilicon pMOS) of thepolysilicon nMOS, 2715 does a source electrode of the polysilicon pMOS,and 2716 does a transparent electrode such as surface ITO.

FIG. 28 is another sectional structure of a polysilicon TFT made for aperipheral circuit of a display unit such as an LCD. Here, referencenumeral 2801 denotes a polysilicon electrode, 2802 does a SiO₂ layeraccording to the present invention, 2803 does a polysilicon layer, 2804does an insulating film such as SiO₂, BSG, or BPSG, 2805 does an Si₃N₄film, 2806 does a glass substrate or a plastic substrate, and 2807 doesa transparent electrode such as surface ITO.

This structure was made by the manner that the polysilicon layer 2803was formed on the Si₃N₄ film 2805, and, after etching the polysiliconlayer 2803, the SiO₂ layer 2802 to be a gate insulating film was formedby plasma oxidation using Kr, and further the polysilicon electrode 2801to be a gate electrode was formed.

In the apparatus shown in FIG. 23, using a two-stage shower platemicrowave-excited high density plasma apparatus in which a two-stageshower plate has been further introduced, when inert gas such as Ar, Kr,or Xe is supplied through the first stage shower plate and material gassuch as SiH₄ is supplied through the second stage shower plate, theelectron mobility in polysilicon formed is 200 to 400 cm²/Vsec at asubstrate temperature of about 300° C. If the channel length is set atabout 1.5 to 2.0 μm, sufficiently high-speed signal processing beyond100 MHz becomes possible. Most peripheral circuits required for drivinga display unit such as an LCD can be made.

Industrial Applicability

According to the present invention, it becomes possible to realize ahigh-quality silicon oxide film superior to a conventional thermal oxidefilm formed at a high temperature of about 1000° C., at a lowtemperature of a substrate temperature of 200 to 500° C.

Besides, since the thickness of the silicon oxide film at a portion neara corner of a silicon oxide film element isolation side wall portionbecomes generally equal to the thickness of a flat silicon surfaceportion, the characteristics such as leakage current and withstandvoltage of the oxide film become good, and an improvement of thereliability of the element and an improvement of the drive performanceof the MOS transistor can be realized.

Besides, even if the angle of the side wall portion of the recessportion of the element isolating region formed on a silicon substrate,with the silicon surface is set at 70 degrees or more or 90 degrees,thinning of the silicon oxide film at a corner of the side wall portiondoes not occur, it becomes possible to form a narrow element isolatingregion, the ratio of an effective area for forming elements such astransistors is increased, and high density integration can be realized.

Further, even in the element isolation structure for integrated elementsof SOI (Silicon On Insulator) transistors and polysilicon transistorsformed on an insulating film, a high-quality oxide film can be formed onthe element isolation side wall portion, and, without any parasitictransistor existing, the electrical characteristics of the transistorscan be good. By using the silicon oxide film formation method of thepresent invention, a very high-quality silicon oxide film can be formedeven though it is formed at a low temperature as a substrate temperatureof 200 to 500° C. By this, fabrication of high-performance amorphoussilicon TFTs or polysilicon TFTs on a metallic substrate SOILSI, a glasssubstrate, or a plastic substrate which was conventionally impossiblebecomes possible, so the effect is great.

What is claimed is:
 1. A semiconductor device including a plurality oftransistors with their substrate of silicon, characterized in that atleast part of a silicon oxide film formed on a surface of said siliconcontains Kr, wherein the content of Kr coatained in said silicon oxidefilm decreases from a surface of said silicon oxide film toward asilicon/silicon oxide film interface.
 2. The semiconductor deviceaccording to claim 1, characterized in that a recessed groove is formedat part of said substrate surface between said plurality of transistors,and a dielectric substance is formed in part of said groove, saidsilicon oxide film is formed on a corner of said substrate surface insaid grove, and at least part of said silicon oxide film contains Kr. 3.The semiconductor device according to claim 2, characterized in that aside wall portion in said groove is formed such that an angle of part ofsaid side wall portion with said substrate surface exceeds at least 75degrees.
 4. The semiconductor device according to claim 2, characterizedin that a difference in thickness of said silicon oxide film between theportions formed on at least part of the surface other than said grooveof said substrate and on at least part of the surface in said groove iswithin 30%.
 5. A semiconductor device wherein a semiconductor film ofsilicon at part of a surface of which a recessed groove is formed or anisland-shape semiconductor film is formed on an insulating film,characterized in that a silicon oxide film is formed on a corner of saidsemiconductor film of said groove or a corner of said semiconductorfilm, and at least part of said silicon oxide film contains Kr, whereinthe content of Kr contained in said silicon oxide film decreases from asurface of said silicon oxide film toward a silicon/silicon oxide filminterface.
 6. The semiconductor device according to claim 5,characterized in that the Kr content in said silicon oxide film is5×10¹¹ cm⁻² or less at a surface density.
 7. A semiconductor deviceincluding a plurality of transistors with a substrate or film ofsilicon, each transistor having source and drain regions each comprisinga high impurity concentration region, characterized in that at leastpart of a portion between said source and drain regions is a siliconoxide film containing Kr, wherein the content of Kr contained in saidsilicon oxide film decreases from a surface of said silicon oxide filmtoward a silicon/silicon oxide film interface.
 8. An MOS transistorhaving a silicon semiconductor portion for its channel region, a siliconoxide film formed on said silicon semiconductor portion and a gateelectrode formed on said silicon oxide film, wherein said silicon oxidefilm contains Kr, and a threshold voltage of said MOS transistor issubstantially equal to that of an MOS transistor having a silicon oxidefilm without Kr, wherein the content of Kr contained in said siliconoxide film decreases from a surface of said silicon oxide film toward asilicon/silicon oxide film interface.